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Create Simulation

warning

This doc is incomplete and WIP!

Create Testbench​

  1. Create a Testbench. To see how a testbench can look like, create a project and select "VHDL Blink with Simulation" or "Verilog Blink with Simulation"
  2. Make sure the testbench is marked
    Mark Testbench

Install Simulator​

Currently, IVerilog and GHDL are supported.

To use IVerilog, simply Setup OSS CAD Suite.

To use GHDL, download the GHDL Extension from the package manager.

Select Simulator​

You can select the simulator to use with your testbench in the testbench toolbar: Select Simulator

There are many